発表論文・著書

通信情報システム専攻 (CCE) > 集積システム工学講座 > 情報回路方式分野 (PAS)

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Tomonori Izumi, Toshihiko Yokomaru, Atsushi Tkahashi, Yoji Kajitani
Computational Complexity Analysis of Set-Bin-Packing Problem
IEICE Trans. on Fundamentals, E81-A, 857-865

Tomonori Izumi, Atsushi Takahashi, Yoji Kajitani
Air-pressure model and fast algorithms for zero-wasted-area layout of general floorplan
IEICE Trans. on Fundamentals, E81-A, 842-849

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B.Y. Song, M. Furuie, Y. Yoshida, T. Onoye, I. Shirakawa
Low-power scheme of NMOS 4-phase dynamic logic
IEICE Trans. Electronics, E82-C, 1772-1776

98 99 00F 00S 01 02 03 04 05 06 07

M. Hatanaka, T. Masaki, T. Onoye, K. Murakami
VLSI architecture of switching control for AAL type2 switch
IEICE Trans. Fundamentals, E83-A, 435-441

98 99 00F 00S 01 02 03 04 05 06 07

Tomonori Izumi, Ryuji Kan, Yukihiro Nakamura
Array-Based Mapping Algorithm of Logic Functions into Plastic Cell Architecture
IEICE Transaction on Fundamentals, E83-A, 2538-2544

B.Y. Song, M. Furuie, Y. Yoshida, T. Onoye, I. Shirakawa
Low-power VLSI implementation by NMOS 4-phase dynamic logic
Trans.IPSJ, 41, 899-907

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Hiroshi Tsutsui, Akihiko Tomita, Shigenori Sugimoto, Kazuhisa Sakai, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura
LUT-Array-Based PLD and Synthesis Approach Based on Sum of Generalized Complex Terms Expression
IEICE Transaction on Fundamentals, E84-A, 2681-2689

Z. Andales, Y. Mitsuyama, T. Onoye, I. Shirakawa
A novel dynamically reconfigurable hardware-based cipher
Trans.IPSJ, 42, 958-966

W. Kobayashi, N. Sakamoto, T. Onoye, I. Shirakawa
3D acoustic image localization algorithm by embedded DSP
IEICE Trans.Fundamentals, E84-A, 1423-1430

98 99 00 01 02F 02S 03 04 05 06 07

R.Y. Omaki, G. Fujita, T. Onoye, I. Shirakawa
An embedded zerotree wavelet video coding algorithm with reduced memory bandwidth requirements
IEICE Trans. Fundamentals, E85-A, 703-713

98 99 00 01 02F 02S 03 04 05 06 07

H. Okada, A.-E. Shiitev, H.-S. Song, G. Fujita, T. Onoye, I. Shirakawa
Error Detection by Digital Watermarking for MPEG-4 Video Coding
IEICE (Institute of Electronics, Information and Communication Engineers) Transaction on Fundamentals of Electronics, Communications and Computer Sciences

Y. Ohtani, N. Kawahara, H. Nakaoka, T. Tomaru, K. Maruyama, T. Chiba, T. Onoye, I. Shirakawa
Wireless Digital Video Transmission System Using IEEE802.11b PHY with Error Correction Block Based ARQ Protocol
IEICE (Institute of Electronics, Information and Communication Engineers) Transaction on Communications, Vol.E85-B

H. Mizuno, H. Kobayashi, T. Onoye, I. Shirakawa
Performance Estimation at Architecture Level for Embedded Systems
IEEE Transaction on Fundamentals of Electronics, Communications and Computer Sciences, Vol.E85-A

宋 天, 藤田 玄, 尾上 孝雄, 白川 功
携帯端末用低消費電力 H.263 Version 2 コーデックコアのVLSI化設計
情報処理学会論文誌 Vol.43, No.4, pp.1161-1170 (2002年5月).

岡田 浩行, 宋 学燮, 藤田 玄, 尾上 孝雄, 白川 功
電子透かしのMPEG-4ビットストリームエラー検出への応用
画像電子学会誌, Vol.31, No.5

98 99 00 01 02 03F 03S 04 05 06 07

N. Sakamoto, W. Kobayashi, T. Onoye, I. Shirakawa
Single DSP Implementation of Realtime 3D Sound Synthesis Algorithm
Journal of Circuits, Systems and Computers, Vol.12

98 99 00 01 02 03F 03S 04 05 06 07

T. Okamoto, T. Yuasa, T. Izumi, T. Onoye, Y. Nakamura
Design Tools and Trial Design for PCA-Chip2
IEICE Trans. on Information and Systems, Vol.E86-D, No.5

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Kosuke Tsujino, Kazuhiko Furuya, Wataru Kobayashi, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura
Design of Realtime 3-D Sound Processing System
IEICE Trans. on Information and Systems, Vol.E88-D, No.5, pp.954-962

Tomonori Izumi, Shinichi Kouyama, Hiroyuki Ochi, Yukihiro Nakamura
An Integrated Approach of Variable Ordering and Logic Mapping into LUT-Array-Based PLD
IEICE Trans. on Fundamentals, Vol.E88-A, No.4, pp.907-914

北浦 直樹, 越智 裕之, 津田 孝夫
微細テクノロジ向けDRCルールファイルからの設計規則抽出とその可視化
情報処理学会論文誌, vol.46, no.6, pp.1404-1415

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小俣 栄治, 石川 憲洋, 村上 慎吾, ヨハン イェルム, 泉 知論, 中村 行宏
異種ネットワーク環境でのP2Pストリーミング
情処論, Vol.47, No.2, pp.334-345

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Hiroshi Tsutsui, Takahiko Masuzaki, Yoshiteru Hayashi, Yoshitaka Taki, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura
Scalable Design Framework for JPEG2000 System Architecture
Intelligent Automation and Soft Computing, Vol.13, No.3, pp.331-343

Kentaro Nakahara, Shin'ichi Kouyama, Tomonori Izumi, Hiroyuki Ochi, Yukihiro Nakamura
Fault Tolerant Dynamic-Reconfigurable Device Based on EDAC With Rollback
IEICE Trans. on Fundamentals, Vol.E89-A, No.12, pp.3652-3658

名古屋 彰, 小栗 清, 中村 行宏
自律再構成可能アーキテクチャPCAの構成手法
電子情報通信学会論文誌 D, Vol.J89-D, No.6, pp.1110-1119

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